merari42@lemmy.world to Programmer Humor@lemmy.worldEnglish · 5 months agoLogic gatelemmy.worldimagemessage-square16fedilinkarrow-up1492arrow-down17
arrow-up1485arrow-down1imageLogic gatelemmy.worldmerari42@lemmy.world to Programmer Humor@lemmy.worldEnglish · 5 months agomessage-square16fedilink
minus-squarepartial_accumen@lemmy.worldlinkfedilinkEnglisharrow-up22·edit-25 months agoThe inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
minus-squareFermionlinkfedilinkEnglisharrow-up7·5 months agoA NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
minus-squarepartial_accumen@lemmy.worldlinkfedilinkEnglisharrow-up4·5 months agoYou’re right, it doesn’t seem like it should but that checks out: 11 1 01 1 01 1 00 0
minus-squarebadcommandorfilename@lemmy.worldlinkfedilinkEnglisharrow-up4·5 months agohttps://en.m.wikipedia.org/wiki/De_Morgan’s_laws
The inversions on both inputs to the NAND gates bothers me. Wouldn’t inverting both inputs as well a the output turn a NAND back into an AND gate?
A NAND gate with two inverted inputs is equivalent to an OR gate. The ouput is only false when both inputs are false.
You’re right, it doesn’t seem like it should but that checks out:
11 1
01 1
01 1
00 0
https://en.m.wikipedia.org/wiki/De_Morgan’s_laws